egais registers. When should balances in egais be equal to actual balances? What are egais registers

You can create a “Transfer to the sales floor” document in several ways:

1. Saving the incoming TTN in the invoice journal when the checkbox is enabledTransfer to the sales area(context menu itemSave in invoice journaljournal Incoming TTN).

2. In the journal of commodity transactions (menu item"Operations | Commodity operations") create the “Other expense” operation (the composition can be filled out using the “Fill with leftovers” operation) and use the item in the context menu"EGAIS: Create a transfer to the trading floor".

3. Add an operation manually in the journal. In this case, you can use the buttonFill in 1 register with remainders, when clicked, a request will be made to EGAIS to obtain balances in the 1st register and then the transaction will be filled in with these balances.

Let’s open the “Transfer to the sales floor” document in the editing window and look in more detail:

Number - document number in the program;

Document type - document type, selected from the list, must take the value “Transfer to the sales floor”;

Document date - document date;

Sender, Sender's branch, Sender's INN/KPP, Reg. sender number, Sender's address- data of the sender of the document;

Note - commentary on the document;

Int. identifier- a unique document number, generated automatically by the program when creating a document;

Document status- the line reflects the state of the document (the last action that was performed with the document from the tabHistory of exchange with EGAIS).

Let's look at the details of the document.

Let's go to the tab Compound :

No. - the serial number in the document is generated automatically;

EGAIS code, Full name - information about alcoholic products;

Help B - registration number of certificate B accompanying the incoming TTN, issued by EGAIS, after registration of the TTN (in the incoming TTN, the certificate number is indicated in the “Certificate B” field). Filled in automatically if the document was created based on the “Other expense” operation in commodity transactions or when saving the incoming TTN in the invoice journal, otherwise the number is entered manually;

Quantity accounting - accounting quantity of alcoholic products moved to the sales area.

Next let's go to the bookmarkHistory of exchange with EGAIS. The entire history of the document is stored here, the actions performed with the document are recorded. Entries are recorded on this tab automatically; manual deletion, addition or modification is prohibited. Let's take a closer look:

date - records the date and time of the request (current computer time);

Request - displays the file or path to the request file;

Type of request - decryption of the completed request;

Answer - response received from EGAIS to the request being executed. Depending on the type of request, the field may be empty, or contain a comment on the request, or take the value “Accepted” if the request is registered in the EGAIS system, and “Rejected” - if for some reason the request was rejected in the EGAIS;

When a cashier sells a bottle of strong alcohol, in EGAIS it is taken from the balance of the second register. This rule has been in effect since October 1, 2016. As a result, if the quantity of products on the second register is zero, its balance goes into the negative, that is, at the end of the working day, the cashier has a negative balance on the second register. To avoid this, you need to transfer the products from the first register to the second.

How to transfer goods

In the “My Products” section, select “Transfer to 2nd Register”, then “Transfer Products”. If the balance has not been updated for a long time, the service will do it automatically. As a result, the user will see a list of goods for which register No. 2 has a negative balance.

When making a transfer, the invoices on which the goods were received will be indicated. The system automatically selects the earliest documents, because the goods from them have most likely already been sold.

The user should check the list and click the Transfer button. EGAIS will process the data and confirm the transfer - the negative balance in the second register will be closed.

For now, the service allows you to transfer exactly as much goods as is necessary to cover the negative balance. Later, the developers plan to add the ability to transfer an arbitrary amount of goods.

Register. Shift Register

A register is a device made of flip-flops to perform a series of actions with binary numbers. For those who do not know what a trigger is, we recommend that you get acquainted with the simplest RS trigger.

The simplest function of registers is to remember a number and store it for a long time. These devices are called storage registers. Here's a simple example.

The number that needs to be saved is supplied to inputs D0 - D2. As soon as a synchronization pulse appears at input C, the number is written to the trigger, changing their state. The figure shows a three-bit holding register. When the number 111 2 is supplied to the inputs, it will also appear on the direct outputs of the triggers ( Q0 - Q2). At inverse outputs ( Q0 - Q2) will naturally be 000 2 . Signal R ( Reset) or reset, the flip-flops are set to the zero state.

Typically registers consisting of 4, 8, or 16 flip-flops are used. The image of a four-bit register on circuit diagrams may look like this.

The figure does not show the inverse outputs of the triggers and the R signal. Registers are always designated by Latin letters RG. If the register is shifting, then an arrow directed to the left, right or double is drawn under the designation.

Shift registers or shift registers.

A shift register is a device consisting of several flip-flops connected in series, the number of which determines the register's capacity. Registers are widely used in computing to convert codes. Parallel to serial and vice versa.

In addition, shift registers are the basis ( ALU) of an arithmetic-logical device, since when a binary number written in a register is shifted one digit to the left, the number is multiplied by two, and when a number is shifted one digit to the right, the number is divided by two. Therefore, the most widespread reversible or bidirectional registers.

Consider a four-bit shift register that converts serial binary code into parallel binary code. The use of serial code is justified by the fact that huge amounts of information can be transmitted over one line. An example of this is the universal serial bus - the USB port of any device. The number of triggers in this register can be any. It is enough to connect the direct output Q3 With D input of the next trigger and so on until the required capacity is reached.

The register works as follows. The first information bit arrives at the input D0. Simultaneously with this bit, a clock pulse arrives at the input WITH. Inputs WITH all triggers included in the register are combined with each other. With the arrival of the first clock pulse, the level at the input D0 written to the first trigger and from the output Q0 comes to the input of the next trigger, but writing to the second trigger does not occur, since the clock pulse has already ended.

When the next clock pulse arrives, the level present at the input of the second flip-flop is stored in it and goes to the input of the third flip-flop. At the same time, the next information bit is stored in the first flip-flop. After the arrival of the fourth clock pulse, the logical levels that were sequentially received at the input will be recorded in the four flip-flops of the register D0.

Let's say these are levels 0110 2. This binary number can then be displayed by connecting LEDs to the outputs of the flip-flops. This is how the considered register is depicted on a schematic diagram.

It can be seen that there is an arrow on the conventional image - an indicator that this is a shift register.

Let's look at how a four-bit universal shift register works. K155IR1(analogue - SN7495N). Here is its internal structure.

The register contains four D-flip-flops, which are interconnected using additional AND - OR logic elements, which allow the implementation of various functions. On the diagram:

    V2 - control input. It is used to select the operating mode of the register.

    Q1 - Q4 outputs of triggers from which the parallel code is removed.

    V1 - input for supplying serial code.

    C1, C2 - clock pulses.

    D1 - D4 - inputs for writing parallel code.

The register operation algorithm is as follows. If a low potential is applied to input V2, clock pulses are applied to C1, and information bits are applied to input V1, then the register shifts to the right. After receiving four bits at the outputs of flip-flops Q1 - Q4, we obtain a parallel code. In this way, the serial code is converted into parallel.

For reverse conversion, the parallel code is written to inputs D1 - D4, applying a high potential to input V2 and clock pulses to input C2. Then, by applying a low potential to input V2 and clock pulses to input C1, we shift the recorded code, and the serial code is removed from the output of the last trigger.

In terms of its structure, this is one of the simplest shift registers.

Shift registers in digital technology can serve as the basis on which assemblies with interesting properties are assembled. These are, for example, ring counters, which are called Johnson counters. Such a counter has a number of states twice as large as the number of its constituent flip-flops. For example, if a ring counter consists of three flip-flops, then it will have six stable states. Nothing is supplied to the counter input except clock pulses. In the initial state, all flip-flops are “reset”, that is, there are logical zeros at the direct outputs of the triggers, but at the input D the first trigger from the inverse output of the third trigger is a logical unit. Let's start sending clock pulses and the process begins.

The truth table clearly shows how the binary code changes when six clock pulses arrive.

N Q 2 Q 1 Q 0
1 0 0 1
2 0 1 1
3 1 1 1
4 1 1 0
5 1 0 0
6 0 0 0

Now you know what a register is and how it can be used in practice. The basis of any register is a trigger. The number of flip-flops in a register determines its capacity. Those who are interested in microcontrollers know that the most important element of any microcontroller, be it PIC, AVR, STM or MSP, is the register.

The area of ​​special function registers SFR (Special Function Register) of the basic MK 8051 is extensive and contains 21 registers, the purpose of which is given in table. 2.3. Their original English names are also given here, on the basis of which their mnemonic names were given.

Registers of special functions indicating the addresses and initial values ​​of the registers are presented in table. 2.4. All registers have byte addresses, but 16 of them, in addition to byte addressing, also allow addressing of individual bits. These registers are highlighted in bold in the table, and the absolute addresses of the individual bits and their mnemonics are indicated for them. Note also that these registers have an address ending with the numbers 0 and 8.

Table 2.3

Register

Name

Accumulator

Register accumulator expander

16-bit DPTR (Data Pointer)

Low byte of the data pointer DPTR (Data Pointer Low)

High byte of the data pointer DPTR (Data Pointer High)

Program Status Word

Stack Pointer Register

Port Latch Register P0

Port P1 latch register

Port P2 latch register

Port P3 latch register

Timer/Counter Counting Register Low Byte 0

Timer/Counter Counting Register High Byte 0

Timer/Counter Counting Register 1 Low Byte

Timer/Counter Counting Register 1 High Byte

Register for setting counter timer modes (Timer/counter Mode)

Timer/counter Control Register

UART data buffer (Serial Buffer)

UART (Serial Control) Control Register

Interrupt Priority Register

Interrupt Enable Register

Power Control Register

The address of directly addressable bits can be written either as an expression<Регистр>.<Разряд>, or as an absolute bit address. For example, the entry TCON.2 means the address of the second bit of the TCON register. In addition, many bits of control registers have their own names - for example, this bit is called IT1.

Table 2.4

Register

Address

Addresses and bit mnemonics

Meaning

atreset

Ending table. 2.4

Register

Address

AddressesAndmnemonicsbits

Meaning

atreset

In Fig. Figure 2.13 shows the entire space of special function registers with their location displayed. As can be seen from the figure, the developers have built into the microcontroller architecture a very significant reserve for creating new models with expanded peripherals and functionality.

Let's look at the purpose of special function registers in more detail.

Rice. 2.13. Special function register space

Battery A and Battery Extender B . The 8051 family of microcontrollers have a battery-centric architecture. Accumulator A is an 8-bit register that is the source of the operand and the location of the result when performing arithmetic and logical operations and a number of data transfer operations. The accumulator can perform logical operations; it also receives the results of a number of logical operations and special movement commands. Some functions are performed only with the accumulator: shifting, testing the contents for zero, etc. A special 8-bit accumulator expander register B is used in conjunction with the accumulator during multiplication and division operations to store the second input operand and place the returned eight bits of the result. In all other operations, register B can be used as a normal working register.

Despite the fact that the architecture of the 8051 family of microcontrollers is battery-centric, it is possible to perform a number of operations without bypassing the battery. Data can be moved from any cell on the chip to any register by address or indirect address; any register can be loaded with a constant, bypassing the accumulator.

Data Pointer Register DPTR . This register is designed to store a 16-bit address when executing variable move instructions throughout the entire VPD address space up to 64 KB. Consists of two software-accessible 8-bit registers DPH (high byte) and DPL (low byte), which, if necessary, can be used as independent general-purpose registers. In addition, DPTR serves as a base register for indirect addressing in forwarding instructions.

Program Status Word Register P.S.W. . When many commands are executed in the ALU, a number of signs are formed that are recorded in the PSW register. After executing the next command, some information about the result of its execution can be entered into individual bits of this register, called flags. In addition, the PSW contains flags for selecting the current bank of general purpose registers and a user programmable flag.

Stack pointer register SP . A stack is a user-defined area of ​​data memory that is written to and read on a last-in, first-out basis. The eight-bit stack pointer register SP contains the address of the last byte written to the stack. The stack is used to pass parameters between subroutines, to temporarily store variables, and to store the status word during execution of interrupt service routines.

The contents of the stack pointer are automatically decremented or incremented whenever data is written to or popped from the stack, and during calls to and returns from subroutines. Theoretically, the stack can be 128 bytes deep. The stack pointer is reset to 07H, so the starting address of the stack contents is 08H. By programmatically changing the contents of the stack pointer, you can move the stack to any area of ​​resident RAM.

When using a stack, it is necessary to take into account that the depth of the stack is not controlled by hardware, and if it increases excessively, memory cells not intended for the stack may be occupied, resulting in loss of information in them. The hardware stack is used to store the return address when servicing an interrupt.

Parallel I/O port latches . Ports P0…P3 are bidirectional I/O ports and are designed to ensure the exchange of information between the MK and external devices, forming 32 I/O lines. The latch registers of these ports are buffer registers that store information during input and output. The purpose and features of working with ports are discussed further in a separate section.

Timer/Counter Registers . Registers TMOD, TCON and register pairs with symbolic names TH0, TL0 and TH1, TL1 are used to provide operation of two 16-bit software-controlled timers/counters. The detailed purpose of these registers will be discussed when describing timers/counters.

Serial Port Registers . Registers with symbolic names SBUF and SCON are intended to set modes and control the operation of a universal asynchronous transceiver. Their description is given in the section devoted to the consideration of the operation of UART.

Interrupt registers . The IP and IE registers are used to software enable interrupts from individual interrupt sources and change the priorities of these sources. As in the previous case, these registers will be discussed when describing the interrupt system.

Power control register PCON . Using the bits of this register, energy-saving idle and power-off modes are established. One of the bits serves as the UART baud rate doubling bit.

Concluding this section, it should be noted that with the further development of the family, registers for expanded resources of new models of microcontrollers are added to the area of ​​special function registers. For example, modern MKs include modules for additional timers, matrices of programmable counters PCA (Programmable Counter Array), watchdog timer WDT (Watchdog Timer), direct memory access DMA (Direct Memory Access), analog-to-digital converter ADC (Analog Digital Converter) and etc.

Register- high-speed memory cells, sometimes represented as a separate device, used to store n-bit binary data and perform transformations on it.

A register is an ordered set of flip-flops, usually D-, the number n of which corresponds to the number of bits in the word. Each register is usually associated with a combinational [ ] a digital device that allows you to perform certain operations on words.

The basis for constructing registers are: D-flip-flops, RS-flip-flops, JK-flip-flops.

Encyclopedic YouTube

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    Typical operations are:

    • receiving a word into a register (setting the state);
    • transferring a word from a register;
    • shift a word left or right by a specified number of bits in shift registers;
    • converting serial word code into parallel and vice versa;
    • setting the register to its initial state (reset).

    Register classification

    Parallel registers

    In parallel (static) registers, bit circuits do not communicate with each other. Common to the bits are usually clocking, reset/set, output enable or receive circuits, that is, control circuits. An example of a static register circuit built on type D flip-flops with direct dynamic inputs, having reset inputs and third-state outputs controlled by the EZ signal.

    Shift (sequential) registers

    Sequential (shifting) registers are a chain of bit circuits connected by transfer circuits. The main operating mode is a shift of code bits from one trigger to another for each clock signal pulse. In single-clock registers with a one-bit right shift, the word is shifted when a clock signal is received. The input and output are serial (Data Serial Right, DSR).

    According to the synchronization requirements in shift registers that do not have logical elements in inter-bit connections, it is impossible to use single-stage level-controlled flip-flops, since some flip-flops can switch repeatedly during the action of the enabling level of the clock signal, which is unacceptable. The appearance of logical elements in inter-bit connections, and even more so, logical circuits of non-unit depth, simplifies the fulfillment of the operating conditions of registers and expands the range of types of flip-flops suitable for these circuits. Multi-cycle shift registers are controlled by several clock sequences. Of these, the most famous are push-pull ones with main and additional registers, built on simple single-stage triggers controlled by a level. At clock C1, the contents of the main register are rewritten into the additional register, and at clock C2 they return to the main register, but to adjacent bits, which corresponds to a word shift. In terms of equipment costs and performance, this option is close to a single-cycle register with two-stage flip-flops.

    Processor registers

    According to their purpose, processor registers differ in:

    • accumulator - used to store intermediate results of arithmetic and logical operations and input/output instructions;
    • flag - store signs of the results of arithmetic and logical operations;
    • general purpose - store operands of arithmetic and logical expressions, indices and addresses;
    • index - store the indices of the source and target elements of the array;
    • pointer - store pointers to special memory areas (current operation pointer, base pointer, stack pointer);
    • segment - store addresses and selectors of memory segments;
    • managers - store information that controls the state of the processor, as well as the addresses of system tables.

    Ternary registers

    Ternary registers are built on ternary flip-flops. Like ternary flip-flops, ternary registers can be of different ternary systems for encoding ternary data (ternary digits): three-level single-wire, two-level two-bit two-wire, two-level three-bit single-unit three-wire, two-level three-bit single-zero three-wire, etc.

    The figure on the right shows a diagram of a nine-bit parallel static gated ternary data register on three three-bit parallel static gated ternary data registers in a three-bit single-unit system of ternary logic elements (lines marked 3B: three-wire), having a capacitance in the exponential positional ternary number system 3 9 = 19683 (\displaystyle 3^(9)=19683) numbers (codes).

    see also

    Notes

    1. http://wiki.miem.edu.ru/index.php/Circuit design:Lectures Chapter 11 Section 1.1 11.1.Classification of registers
    2. http://www.intuit.ru/department/hardware/archhard2/2/2.html Internet University of Information Technologies. Architecture and organization of computers. V. V. Gurov, V. O. Chukanov. 2.Lecture: Basic functional elements of a computer, part 2. Storage register. Fig.2.5. Structure of a four-bit holding register with asynchronous set input 0 . Fig.2.6. Symbolic graphic designation of a four-bit storage register with an asynchronous installation input to 0
    3. http://www.bashedu.ru/perspage/wsap/posobie/chapter3/6.htm Fundamentals of digital electronics. 3.6. Registers. Storage registers. Fig.3.25. Functional diagrams of the main types of registers. Rice. 3.26. Storage registers, on D-flip-flops synchronized by the clock pulse level (a), edge (b) and on RS-flip-flops synchronized by the edge (c)
    4. http://www.gsm-guard.net/glossary/_r.htm Glossary. Shift register
    5. http://kpe.hww.ru/spravka_circuitry/rs.htm Shift registers
    6. http://dssp.karelia.ru/~ivash/ims/t12/TEMA6.HTM Shift registers. Fig.1. Shift registers on JK flip-flops
    7. http://www.airalania.ru/airm/147/53/index.shtml 6.1. Shift Registers and Ring Counters
    8. http://www.intuit.ru/department/hardware/archhard2/2/2.html Internet University of Information Technologies. Architecture and organization of computers. V. V. Gurov, V. O. Chukanov. 2.Lecture: Basic functional elements of a computer, part 2. Shift register. Fig.2.7. Shift register structure. Fig.2.8. Symbolic graphic designation of a four-bit shift register with an asynchronous installation input 0
    9. http://dfe3300.karelia.ru/koi/posob/log_basis/registr2.html Logical foundations of computers. Parallel shift registers. Fig.9.1 Block diagram of a 4-bit parallel ring register. Fig.9.2. Logic circuit of a 4-bit ring register
    10. http://www.bashedu.ru/perspage/wsap/posobie/chapter3/6.htm Fundamentals of digital electronics. 3.6. Registers. Shift registers. Rice. 3.27. Shift registers on D-flip-flops a), RS-flip-flops b) and a combined register on D-flip-flops
    11. http://www.texnic.ru/tools/cif_ms/7.html 7. REGISTERS. 7.1. Shift registers. Rice. 248. Twelve-bit shift register

     

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